This invention relates to an electrode made of multicomponent layer having a low resistivity and providing ohmic contact or rectifying contact and also to a semiconductor device provided with the electrode.
FIG. 1 shows a known semiconductor device with an electrode. The device comprises a single-crystalline silicon substrate 1, an n-type or p-type single-crystalline silicon layer 3 formed in the substrate 1, and a p-type or n-type semiconductor layer 4 formed in the layer 3 and having a resistivity much lower than that of the layer 3. The upper surfaces of the layers 3 and 4 are flush with a major surface 2 of the substrate 1. An insulating layer 5 is formed on the entire surface of the structure, except for a part of the semiconductor layer 4. Further an interconnection layer 6 is formed on the insulating layer 5 and said part of the semiconductor layer 4.
The semiconductor layer 4, which lies between the single-crystalline silicon layer 3 and the interconnection layer 6, is an electrode or contact layer. That is, the layer 4 transfers electric charge between the layers 3 and 6 in a specific manner to operate the semiconductor device. If the layers 3 and 4 have the same conduction type, n-type or p-type, the layer 3 is ohmically connected to the interconnection layer 6 through the semiconductor layer 4. If the layers 3 and 4 are of different conduction types, they provide the semiconductor device with rectifying property.
The semiconductor layer 4 should have a low resistivity, when it connects the substrate 1 and the layer 3 ohmically, or when it is used as, for example, the emitter of a transistor, to connect the substrate 1 and the layer 3 with rectifying property. If the resistivity of the layer 4 is low, power loss in the layer 4 due to a voltage drop will be reduced, the delay of a signal passing through the layer 4 will be shortened, and emitter injection efficiency will be enhanced.
Conventionally, the layer 4 is formed by diffusing or ion-implanting donor or acceptor impurity into the single-crystalline silicon layer 3. Annealing process follows ion-implantation. To form the layer 4 in this way, a thermal treatment at high temperatures about 900.degree. C. is usually necessary. The treatment is likely to cause defects in the silicon substrate 1 and the single-crystalline silicon layer 3 and to promote the contamination of the semiconductor device, thus possibly degrading the performance of the device. To make the matter worse, during the treatment the donor or acceptor impurity diffuses from the layer 4, inevitably changing both the structure and electrical characteristics of the semiconductor device. This makes device design difficult and complicated. The high temperature thermal treatment has further disadvantages such as limitation of materials to be used and high production cost.
Moreover, since the semiconductor layer 4 is formed in the single-crystalline silicon layer 3 as shown in FIG. 1, the layer 3 must be made so large that the layer 4 may have a sufficient volume. This means that the semiconductor device as a whole has to be large.
It has been proposed that the semiconductor layer 4 be made of poly-crystalline silicon or amorphous silicon. This is because these material require but a low temperature process. However, poly-crystalline silicon and amorphous silicon have an extremely high resistivity. Their use is thus limited.
P-type poly-crystalline silicon available at present has a resistivity of 2.times.10.sup.-3 .OMEGA..multidot.cm at the least as disclosed in "Thin Solid Films, 18 (1973) 145-155", page 152, FIG. 12. N-type amorphous silicon made by the known CVD (chemical-vapor-deposition) method has a resistivity of 10 .OMEGA..multidot.cm at the least, as stated in "J. Phys. Soc. Japan 49 (1980) Suppl. A pp. 1233-1236", page 1234, FIG. 1. P-type and n-type amorphous silicons formed by the glow-discharge technique have also a high resistivity. Their resistivity is 100 .OMEGA..multidot.cm at the least, as disclosed in "Philosophical Magazine, 1976, Vol. 33, No. 6, pp. 935-949", page 940, FIG. 3.
If a semiconductor device is made of poly-crystalline silicon or amorphous silicon, both having a high resistivity, a long delay time and a large voltage drop are unavoidable. The device will therefore operate at a low speed and consumes much power.
Accordingly an electrode and a semiconductor device with an electrode have long been desired, the electrode being made of material which has a low resistivity and which makes it possible to manufacture the device by a low temperature process.